Technical Field
Embodiments described herein are related to timebase synchronization in integrated circuits such as systems on a chip (SOCs).
Description of the Related Art
In digital systems, real time (or “wall clock time”) is represented by a timebase. Typically, the timebase is reset to zero at system startup, and is incremented according to a clock in the system. If the real time at the system startup is known (usually maintained in software), then the timebase value can be added to the real time to determine the current time.
For larger systems or integrated circuits in the system, such as SOCs, accessing a single global timebase with low latency is a challenge. In the past, a global timebase bus was sent across the SOC to locations at which access to the timebase is needed. While this approach can provide low latency access, it increases area overhead to route the bus to all the desired access points and it is difficult to close timing in the physical design because of the latency of signal propagation on the bus. Another approach includes adding local timebases across the SOC. However, due to local clock variations and even different clock sources for clocks at various points, synchronization between the global timebase and the local timebases can easily be lost. Software may read the global timebase and propagate the timebase to the local timebases to synchronize to the local timebases, but the latency to propagate the new values must be accounted for and is difficult to determine precisely. Additionally, software synchronization may be much less frequent than desirable, allowing local timebases to experience wide variations during the time period between synchronizations.
Furthermore, to maintain timebase accuracy, a high-quality crystal clock signal is required. While low frequency crystal clock signals may be available, such clocks do not provide higher accuracy/granularity in the timebase because the timebase updates occur too infrequently as compared to the operating clock frequencies of various components of the SOC. It is difficult to obtain the required frequency through a crystal signal. Furthermore, an external timebase may be maintained based on the low frequency crystal clock signal, and synchronization between the external timebase and various timebases within the SOC may be difficult to achieve.